EE8351 Digital Logic Circuits(DLC) 2017 Regulation MCQ, Notes and Syllabus Anna University

Anna University EE8351 Digital Logic Circuits 2017 Regulation MCQ, Notes and Syllabus.

ME8595 THERMAL ENGINEERING – II

UNIT I NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES:

Review of number systems, binary codes, error detection and correction codes (Parity and Hamming code) - Digital Logic Families -comparison of RTL, DTL, TTL, ECL and MOS families -operation, characteristics of digital logic family.

UNIT II COMBINATIONAL CIRCUITS:

Combinational logic - representation of logic functions-SOP and POS forms, K-map representations - minimization using K maps - simplification and implementation of combinational logic – multiplexers and de multiplexers - code converters, adders, subtractors, Encoders and Decoders.

UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS:

Sequential logic- SR, JK, D and T flip flops - level triggering and edge triggering - counters - asynchronous and synchronous type - Modulo counters - Shift registers - design of synchronous sequential circuits – Moore and Melay models- Counters, state diagram; state reduction; state assignment.

UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS AND PROGRAMMABILITY LOGIC DEVICES:

Asynchronous sequential logic circuits-Transition tability, flow tability-race conditions, hazards and errors in digital circuits; analysis of asynchronous sequential logic circuitsintroduction to Programmability Logic Devices: PROM – PLA –PAL, CPLD-FPGA.

UNIT V VHDL:

RTL Design – combinational logic – Sequential circuit – Operators – Introduction to Packages – Subprograms – Test bench. (Simulation /Tutorial Examples: adders, counters, flip flops, Multiplexers and De multiplexers).

 

2017 Regulation

Notes:

EE8351 Digital Logic Circuits Notes - Click here

MCQ:

EE8351 Digital Logic Circuits MCQs - Click here

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